| Support FAQ |
| Device and I/O:
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| 1. |
Which FPGAs are currently supported?
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| 2. |
Does 7Circuits support all pins and features in targeted FPGAs?
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| 3. |
Which interfaces are supported out of the box?
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| 4. |
Can I add new interfaces? If so, how do I do that?
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| 5. |
Can I use DCI with 7Circuits?
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| 6. |
What if I want a certain interface to use a particular bank(s)?
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| 7. |
Can I generate my own interface file?
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| 8. |
Can I add more interfaces to an already existing 7Circuits project?
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| 9. |
What if I have a pin constraints file file for an interface that I don't want 7Circuits to disturb?
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| 10. |
What pin constraints file commands are supported by 7Circuits?
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| PCB and Pin-outs:
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| 11. |
What options do I have if 7Circuits shows a lot of bow-tie effects?
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| 12. |
When should I use "Incremental Build" as opposed to "Simultaneous Build" for building the boards?
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| 13. |
Is there a maximum number of pins that 7Circuits can handle?
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| 14. |
There seem to be quite a few pins left, but my design could not be completely pinned out. What should I do?
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| Schematics, symbols and libraries:
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| 15. |
How does 7Circuits collect the required input?
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| 16. |
What is 7Circuits' input format?
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| 17. |
How can I make use of the EDIF netlist that 7Circuits generates?
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| 18. |
Can I use the symbols from my library to build schematics using 7Circuits?
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| 19. |
I have already completed my board schematics. However, I would like to verify that I selected the optimal pins, that all the pin out rules were followed, and my Verilog, schematics, and pin outs are all consistent. Is that possible?
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| Miscellaneous:
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| 20. |
Which operating systems are currently supported?
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1. Which FPGAs are currently supported?
Ans.
The current release supports Xilinx and Altera FPGAs. In Xilinx,
Virtex-4 and Virtex-5 FPGAs are supported. The Altera Stratix II and
Stratix IIGX FPGAs are supported. We are constantly adding support for
new FPGAs. If you require support for other FPGAs, please check with us
at support@tarayinc.com. |
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2. Does 7Circuits support all pins and features in targeted FPGAs?
Ans.
7Circuits can complete all clock, configuration and power supply connections for the FPGA. Termination resistors are not supported in the current version. |
3. Which interfaces are supported out of the box?
Ans.7Circuits supports a large number of interfaces, for example: all types of memories, both component and DIMMs, PCI, PCI express, EMIF (DSP), SPI 4.2, all supported configuration I/Fs, power supply I/Fs, etc.
We
continuously keep adding new interface support. Please download the
latest version of the tool to get the latest updates. Or, you can
e-mail us at support@tarayinc.com. |
4. Can I add new interfaces? If so, how do I do that?
Ans.
A component of 7Circuits allows you to add new interfaces. User guide provides details on adding new interfaces. |
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5. Can I use DCI with 7Circuits?
Ans.
Yes. You can use DCI by checking the DCI box in Interface properties. The interface properties can be viewed by right clicking the interface while you are in 7Circuits board view. |
6. What if I want a certain interface to use a particular bank(s)?
Ans.
You can associate a "Use Banks" property to the interface by right-clicking on the interface and selecting this property. The tool will then use only the specified banks for interface pin allocation. |
7. Can I generate my own interface file?
Ans. Yes. You can add interfaces to 7Circuits using a simple GUI.
Taray also provides services to add new interfaces. Please contact us by e-mail at support@tarayinc.com to request new interfaces in the tool. |
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8. Can I add more interfaces to an already existing 7Circuits project?
Ans.
Yes. You can open a 7Circuits project, and then add more interfaces to it. You have the option of keeping existing projects undisturbed while doing this. |
9. What if I have a pin constraints file file for an interface that I don't want 7Circuits to disturb?
Ans.
Existing pin constraints file is used either to reserve pins or to make changes to the existing design. |
10. What pin constraints file commands are supported by 7Circuits?
Ans.
Any pin allocation commands such as INST, NET, etc are supported. In addition, the PROHIBIT command is supported. |
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11. What options do I have if 7Circuits shows a lot of bow-tie effects?
Ans.
7Circuits optimizes pin selection to minimize bow-tie effects, and thus reduce PCB layers. This results in a lower manufacturing cost for the product. In some cases, you may wish to improve upon results produced by 7Circuits. As the results of pin allocation are visible right away there is no need re-analyze using multiple tools. To improve bowtie effects, you can do the following:
- Rotate the interface with respect to the FPGA. This can reduce the bow-tie effects. To rotate an interface, you have to use the right-click option on the interface.
- Try to generate the pins incrementally, rather than simultaneously.
- Try to specify the banks for each interface, or at least for the interface that has too much of bow-tie.
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12. When should I use "Incremental Build" as opposed to "Simultaneous Build" for building the boards?
Ans.
Incremental build will produce results that are different from simultaneous build. The use of one versus the other is dictated by your design.
When a high percentage of pins is used, incremental build may produce better results. Incremental build along with use banks is another option that can be used.
To incrementally build a project, set the Build Options in the Project menu to Incremental Build. This will maintain the existing connectivity and pin-out information for a previously completed project. Pin allocation steps will be performed only for newly added interfaces.
To rebuild the entire project again, set the Build Options in the Project menu to Re-build. This will re-assign pins for the entire project. |
13. Is there a maximum number of pins that 7Circuits can handle?
Ans.
No. 7Circuits can pin-out close to 100% of the available pins. In many situations it may be impossible to pin-out 100% of the pins due to IO standards/bank utilization restrictions, as opposed to any tool limitation. |
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14. There seem to be quite a few pins left, but my design could not be completely pinned out. What should I do?
Ans.
There are a few options here. The main reason why your design could not be completely pinned out is probably because the IO banking rules could not be satisfied for all present interfaces.
You could try using "Best Fit" optimization instead of "Nearest Bank". This will help you determine if it is possible to fit all pins. After the "best fit" optimization, you can move the interfaces to a more suitable placement, and try the "nearest bank" optimization again.
By performing multiple iterations of this process, it may be possible to fit all the pins, especially if you are off by a few. You can send us an email at support@tarayinc.com if you need help. |
15. How does 7Circuits collect the required input?
Ans.
Very soon 7Circuits will have a verification mode. In this mode, you can verify that the schematics, RTL and pin constraints file are consistent. 7Circuits will also be able to do minor modifications to optimize your pin-outs and enhance your schematics. |
16. What is 7Circuits' input format?
Ans.
7Circuits uses board placement information as one of its main inputs. Any other information required for the functioning of 7Circuits is already present within the tool. |
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17. How can I make use of the EDIF netlist that 7Circuits generates?
Ans.
The EDIF schematics generated by 7Circuits is used for reading into Orcad. 7Circuits interfaces with Mentor DxDesigner and Cadence DE-HDL in the native formats. |
18. Can I use the symbols from my library to build schematics using 7Circuits?
Ans.
The EDIF netlist generated by 7Circuits can be imported into standard schematic tools from Cadence and/or Mentor Graphics. |
19. I have already completed my board schematics. However, I would like to verify that I selected the optimal pins, that all the pin out rules were followed, and my Verilog, schematics, and pin outs are all consistent. Is that possible?
Ans.
Yes. You can use the symbols from your existing symbol library to build schematics using 7Circuits. |
20. Which operating systems are currently supported?
Ans.
Windows XP and Red Hat Linux are supported. |
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