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| Executive Team
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Nagesh Gupta
CEO
Nagesh is a founder of Taray. Nagesh started his career designing and
verifying HP-PA RISC processors for Hewlett Packard in Cupertino.
Later, Nagesh then ran Engineering for a wireless networking startup
called Redwave Networks. After Redwave, Nagesh has been associated with
Xilinx. This association later led to the formation of Taray. Nagesh’s
experience spans high speed board design, ASIC, and FPGA design and
verification. Nagesh has more than 15 years of experience in hands on
engineering roles as well as managing small to large groups for product
delivery.
Nagesh has a Bachelor’s degree in Electrical & Electronics
Engineering from B.I.T.S, Pilani, India, and a Master’s in Electrical
Engineering from University of Kansas, USA.
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Sarala Beeneedi
VP FPGA
Sarala has been associated with Taray ever since its inception. She has been instrumental in the success of Taray's products. Sarala has more than 20 years of experience in VLSI, ASIC and board designs. Sarala has worked both in India and in the United States.
Sarala has a Bachelor's degree in Electronics and Communications from Institute of Electronics and Telecommunications, Delhi, and a Master's degree in Advanced Electronics from JNTU, Hyderabad.
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Ravi Vedula
VP EDA
Ravi started his career developing EDA tools and simulation models. Prior to
joining Taray, Ravi managed R&D teams at various levels for tool
development and chip design methodologies specifically in the areas of
timing analysis, circuit simulation/modeling, cell characterization,
and printed circuit board design/layout at Cadence, Motorola and Mentor
Graphics.
Ravi has a Bachelor’s degree in Electronics
& Communication Engineering from Osmania University and a Master’s
in Electrical Engineering from IIT, Delhi.
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Abhijit Athavale
VP Marketing
Abhijit started of as an R & D engineer designing communications products at Meltron. Later, at Xilinx, he held a variety of positions in marketing, as well as applications and software engineering. Prior to Taray, he ran marketing for Xilinx' high-speed serial and parallel connectivity solutions. In this role, he was responsible for strategy development, product positioning, and partnership and marketing program development. Abhijit is an accomplished speaker and author of several published papers.
He
has a Bachelor’s degree in electrical engineering from the University
of Pune and Master’s degree in electrical engineering from Texas A
& M University.
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Logical Constraints
