1. Change in the market forces the requirements to change
2. There's a need to produce a high performance variant and a low cost variant of the same design
3. FPGA design engineers require changes to accommodate the requirements
4. The board Signal Integrity team requires you to use on chip termination resistors, etc.

In today's FPGA design methodology, change is disastrous. Even a seemingly trivial design change requires a wholesale FPGA pin out change.A change to the pin out obviously changes all FPGA symbols, and possibly schematics. All voltage supply connections may also change, as the banks connected to different interfaces may have changed.

Change just resets the clock as far as board design goes.

This is not acceptable. You need a solution where change can be managed easily. You need a solution that recognizes change as an integral part of the design cycle.

Stuck between a cost and performance trade-off?

This is a typical problem faced by every system architect today. And, the answer is not easy if you are building a system using FPGAs.
Let's consider a system that will be built using the following components:

1. Xilinx Virtex-5 FPGA - 5VLX110
2. A DDR2 memory with a 72-bit DIMM interface
3. A 36-bit QDRII interface
4. A 40 pin connector
5. Configuration, Clocks, etc.
6. Power supplies

Based on this information, there are three different packages that can be used. However, choosing the optimal package for your system design requires completing the pin assignment process. System cost is another factor. If for example, the FF1760 package is chosen pushing the system cost to $5K against a target of $4K. Now, let's say you have the freedom to reduce the system bandwidth. Do you know which package can be used with a DDR2, 36 bit component and a QDRII 18 bit component? 7Circuits enables you to perform these trade-offs within minutes, and thus increases your productivity.

Tired of manual pin assignments?

When designing with high-density FPGAs, board connectivity definition requires manual assignment of ~2000 pins to logic signals. Calling this task non-trivial is to understate the problem. Not only is the task manually intensive and repetitive, a myriad electrical, functional, and banking rules must be followed for a successful conclusion. In addition, different engineers from different groups need to communicate and coordinate to arrive at a convergence. This makes the FPGA pin assignment process quite a challenge that gets exponentially difficult when using more than a single FPGA.

It is very easy to conclude that
a solution that that uses a system level approach to pin assignments is required. The following factors are considered:

1. The relative placements and positions of FPGA(s) and connecting parts on the PCB
2. FPGA banking rules to be followed
3. I/O standards used by the parts that connect to the FPGA
4. Any protocol level grouping rules to be followed

1. FPGA logic changes to support timing closure, performance enhancements, or feature additions
2. Interface width change to improve system throughput
3. Package size changes, especially larger package to smaller package to lower design costs

7Circuits offers the following benefits to the teams designing FPGA based boards:

1. Automatic generation of FPGA pin outs
2. Automatic generation of FPGA power supply connections, and all its components connected to it.
3. Automatic creation of schematics and symbols and their regeneration due to changes in all the popular EDA tools